Semicon Singapore Logo Date Header
Register
2010 Programmes & Events
   
Semi Logo  
 
Bookmark and Share

Product Test Engineering

Event Code:
Date:
Time:
Location:

STS – S5
Thursday, 20 May 2010
09:30 – 13:30
Level 3, Suntec Singapore

Session Chair:

Mr Jeffrey Lam
Senior Director
GLOBALFOUNDRIES Singapore Pte Ltd

 

[09:20 – 09:30]

Semi Address and Introduction

[09:30 – 10:15]

Keynote: Cost of Test Operation

Octavio Martínez
Senior Director of Engineering

Qualcomm Inc.

[10:15 – 10:45]

Benefits of Flip Chip Wafer Sort Using MEMs Multi Site Capability

Mr. Lo Wee Tick

Turnkey Wafer Sort Manager

GLOBALFOUNDRIES Singapore Pte Ltd

[10:45–11:15]

RF Vector Calibration to the End of Probe Needles using LRL (Line – Reflect – Line) Approach
Mr. Steffen Chladek
Business Development Manger
LTX – Credence

 

[11: 15–11:30]

Break

[11: 30–12:00]

Mr. Rathinakumar Vaidyanathan
Director, Supply Chain and PLM Applications – Asia Pacific
Oracle Corporation

[12: 00–12:30]

Concurrent Testing
Mr. Charles Fei
Field Product Specialist
Teradyne (Asia) Pte Ltd.

[12: 30–13:00]

Quantifying RF Concurrent Test as a Means to Reduce Operational CoT
Mr. Anthony Lum
SoC Product Engineer
Advantest America, Inc.

[13: 00–13:30]

Optimization of Test Hardware/ Software for Test Cost Reduction
Mr. Goh Szu Huat
GLOBALFOUNDRIES Singapore Pte Ltd

Programmes are subject to change without prior notice

Back to Agenda

Bronze Sponsor